Cadence design systems company today released an Cadence ® Allegro ® PCB "> PCB design of the Global Route Environment technology. This revolutionary technology is a combination of graphical interconnection flow planning framework and a hierarchical Global routing engine, for PCB" > PCB designer provides automatic, intelligent planning and wiring of the Environment. The first introduces intelligent automation in the field of unprecedented automatic wiring solutions, Global Route Environment technology represents a significant leap, and set up a new PCB design specification.
Before the advent of the technology for PCB designers take weeks or months time to manually define with multiple interconnection bus and multiple large-scale pin number equipment complex wiring design at a high speed. Leading to the extension of the design cycle and an estimate, and affect the progress of the project and budget. Cadence with several early procurement partners work together to define the problem, and promote and prove the unique solution.
"As Cadence Global Route Environment technology key partners, MOTOROLA's very glad to become a new generation of the first batch of printed circuit wiring platform users." MOTOROLA's printing line manager Jeff Underwood said. "Through the use of the new, improved wiring environment, MOTOROLA engineers and designers can be in the layout design process more accurately communicate design intent."
PCB design personnel has been seeking a may contain environment - to grasp its global design features of PCB design intent, and provide decision feedback, and intelligent and automatic execution in accordance with the design intent of the design task. The new Global Route Environment technology provides these functions. Using the graphical interconnection flow planning architecture, designers can create and define key intelligent abstract interface, and enter the interconnect design intent. The environment also make full use of the function of global routing engine, allow designers to the knowledge and design intent combined with hierarchical view of the design, and planning the best interconnect solutions as much as possible.
"We are sure that Global Route Environment technology in new Cadence interconnection flow can significantly reduce the current iteration redundancy in the process of wiring", Sun Microsystems PCB design technical manager Jim Tafoya said, "this is Cadence of a pioneering efforts, enhances the Cadence contribution of technology development for the PCB industry."
"Our early purchasing customers in helping us understand the product design requirements has played a key role, and in the course of the next verify our unique solution", Cadence products marketing vice President of Global Charlie Giorgetti, said "Allegro PCB design based Global Route Environment technology will help customers solve problems brought by the interconnection quickly, before this, this problem will take weeks or even months of artificial, and affect the project process and budget."
