To reduce noise and electromagnetic interference of some tips:
(1) can use the low speed chip need not high-speed, high-speed chip used in key areas.
(2) available string of a resistor, jump up and down along the lower control circuit transmission rate.
(3) try to provide some form of damping for relay, etc.
(4) use the lowest frequency clock meet the system requirements.
(5) the clock generator nearly as far as possible to use the clock of the device. Quartz crystal oscillator to ground.
(6) land circle line to clock zone, as far as possible the clock line is short.
(7) the I/O driver circuit near printing plate edge as far as possible, as soon as possible to leave the printing plate. To enter the PCB to add filtering signal, signal from high noise area, also want to add filtering by series resistor at the same time, reduce the signal reflection.
(8) Receive high MCD useless side, or ground, or defined as output, an integrated circuit to connect the power connection to the end, don't hung up.
(9) sit idle gate input don't hung up, sit idle grounding of the op-amp is input, the negative input output terminal.
(10) printed circuit board, as far as possible use 45 line instead of 90 line wiring as to reduce the emission of high frequency signal foreign and coupling.
(11) printed circuit board according to the frequency and current switch feature partition, noise components and the noise components to distance far away again.
(12) single panel and double panel with a single point to connect power and single point grounding, power cord, ground wire, as far as possible the economy is able to bear with laminated to minimize the power and the RongSheng inductance.
(13) clock, bus, choose to stay away from the I/O signal lines and connectors.
(14) analog voltage input line, the reference voltage to try to stay away from the digital circuit, signal lines, especially the clock.
(15) to the A/D class devices, digital and analog part part it is better to unified under the cross.
(16) the clock line perpendicular to the I/O line is smaller than parallel I/O line interference, the clock component pin from the I/O cable.
(17) component pin short as far as possible, decoupling capacitor pin short as far as possible.
(18) the key line to coarse as far as possible, and on both sides and protected area. High speed wire to short to be straight.
(19) line not sensitive to noise and high current, high speed switching line parallel.
(20) under the quartz crystal, and don't leave a line under the devices that are sensitive to noise.
(21) weak signal circuit, low-frequency don't form a current loop around the circuit. Don't form a loop
(22) signals, such as the inevitable, let the loop area small as far as possible. Each integrated circuit
(23) a decoupling capacitor. Each electrolytic capacitor side to add a small high-frequency bypass capacitors.
(24) or poly (cool capacitance with large capacity of tantalum electricity instead of electrolytic capacitor for energy storage capacitor charging and discharging circuit. When using the tubular capacitance, shell to ground.
