Keyword: PCB material, circuit board, PCB production
In today's wireless communications equipment, rf part often USES the miniaturization of the outdoor unit structure, and radio frequency, intermediate frequency part of outdoor units, as well as to monitor the outdoor unit part of low frequency circuit are often deployed on the same PCB material. Excuse me, if you have any requirements on the PCB material? How to prevent the radio frequency, intermediate frequency and low frequency circuit interference between each other?
Hybrid circuit design is a big problem, it is difficult to have a perfect solution. General rf circuit in the system all of us as an independent single board layout, may even have special shielding cavity. Rf circuit and generally for single or double panel, the circuit is relatively simple, all of these are in order to reduce the influence of distributed parameter for rf circuits, and improve the consistency of the rf system. Compared with the general FR4 is qualitative, rf circuit board with high Q value of the base material, the dielectric constant of the material smaller, distributed capacitance is small, a transmission line impedance is high, the small signal transmission delay.
Although in the hybrid circuit design, rf, digital circuit on the same piece of PCB, but is generally divided into radio frequency circuit and digital circuit, layout, respectively. Between and shielding box with grounding via belt shielding.
In the design of high speed high density PCB, the crosstalk (crosstalk interference) is, indeed, it is important to pay special attention to, because it is the timing (timing) and signal integrity (signal integrity) has a great influence.
The following provides several note:
1. The continuous and matching control go line characteristic impedance.
2. The size of the line spacing. General often see the spacing for the double line width. You can go through the simulation to know line spacing influence on timing and signal integrity, find out the minimum distance can be tolerated.
Different signal chip results may be different.
3. Select the appropriate termination.
4. Avoid running up and down between two layers of the same direction, even walk line overlap together up and down, just because of this crosstalk is greater than adjacent tree go line situation.
5. Using the blind hole buried (blind/buried via) to increase the line area. But the PCB production costs will increase. In the actual execution time really hard to achieve full parallel with isometric, but still want to try to do it. In addition to this, you can set aside difference termination and common-mode termination, to mitigate the impact on the timing and signal integrity.
