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Patent Issued for Fabricating Method for Multilayer PCB

by: Nov 26,2013 695 Views 0 Comments Posted in Engineering Technical

By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent by the inventor Watanabe, Ryoichi (Sakai, JP), filed on August 14, 2012, was published online on November 5, 2013, according to news reporting originating from Alexandria, Virginia, by VerticalNews correspondents.

Patent number 8574444 is assigned to Samsung Electro-Mechanics Co., Ltd. (Suwon, KR).

The following quote was obtained by the news editors from the background information supplied by the inventors: "The present invention relates to a fabricating method for a multilayer printed circuit board.

"With electronic devices being geared towards higher functionalities and smaller sizes, the need is increasing for enhancing the functions of circuit components and increasing package density. There is also a need for improving the module to which the circuit components are joined, for increasing package density and functionality. The current trend is to mount the circuit components on a circuit board having a multilayer structure, so that the package density may be improved. In particular, the multilayer printed circuit board that uses connection by inner vias is commonly utilized as a means for increasing circuit density. Furthermore, the component-integrated circuit board is being developed, in which wiring patterns connect the mounting area with the LSI areas or the components by as short a distance as possible to reduce space.

"With the printed circuit board continuously becoming lighter, thinner, and simpler, the width and pitch of the circuit patterns are reaching values lower than 50 .mu.m and even 25 .mu.m. In such conditions of minute values, however, the circuit patterns are subject to becoming detached during the processing procedures, which can lower production yield, while bending and warpage, etc., can occur in the board. There may also be other problems affecting reliability, such as problems in migration resistance and heat resistance after moisture absorption, etc."

In addition to the background information obtained for this patent, VerticalNews journalists also obtained the inventor's summary information for this patent: "An aspect of the invention is to provide a method of fabricating a thin multilayer printed circuit board.

"Another aspect of the invention is to provide a fabrication method for a multilayer printed circuit board, which enables fine-lined circuits while providing high reliability.

"One aspect of the invention provides a method of fabricating a multilayer printed circuit board, which includes: forming a first circuit-forming pattern and a first insulation layer, into which the first circuit-forming pattern is inserted, on a first carrier; forming inner circuit patterns and inner insulation layers over the first insulation layer, and forming inner vias connecting the inner circuit patterns positioned on different insulation layers; forming a second circuit-forming pattern on a second carrier and inserting the second circuit-forming pattern into a second insulation layer on an outermost side; removing the first carrier and the second carrier; forming circuit-forming grooves by removing the first circuit-forming pattern and the second circuit-forming pattern, and forming via-forming indentations connected with the circuit-forming grooves; and forming outer circuit patterns and outer vias by filling the circuit-forming grooves and the via-forming indentations with a conductive material.

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