In high-speed design , the impedance matching or not related to the signal quality of the merits . PCB impedance matching technology can be said to be rich and varied, but in particular how the system can be more reasonable application of factors need to measure various aspects . For example, we designed the system , are the source of many series matching section used . Under what circumstances need to match what way match adopt , why adopt this approach.
For example: Most of the differential matching using matching terminal ; clock using the source segment matching ;
1 , the series termination
Theoretical starting point of the series termination of the signal source impedance lower than the transmission line characteristic impedance condition between the source terminal and the transmission-line signal in series with a resistor R, so that the characteristic impedance of the source output impedance of the transmission line matches inhibition the signal reflected from the load is reflected again.
After termination signal transmission series has the following features:
A role due to the series resistance of the match , when the driving signal amplitude of 50% of its spread to the load end of the transmission;
B signal in the load reflection coefficient is close to +1 , and therefore the amplitude of the reflected signal is close to 50 % of the original signal amplitude.
C signal and the reflected signal is superimposed transmission of the source , so that the amplitude of the original signal and the termination signal is subjected to approximately the same load ;
D to the load side of the reflected signal source spread at the source end after matching resistor absorption ; ?
E reflected signal reaches the source , the source drive current drops to zero until the next transmission signal .
Relative parallel matching , the matching is not required in series with the drive signal capable of driving a large current .
Select the series termination resistor value principle is very simple, is to ask the output impedance of the transmission line characteristics and resistance values with the drive to match the impedance of the same. Ideal signal output impedance of the driver is zero , the actual drive is always a relatively small output impedance, and when the signal level changes, the output impedance may be different. For example, the power supply voltage of +4.5 V CMOS driver , while the typical low output impedance 37Ω, while the typical high output impedance of 45Ω [4]; TTL and CMOS drive the same drive , the output impedance of the signal will vary level size changes. Therefore, TTL or CMOS circuits, there can be very correct matching resistor , can only be considered a compromise .
Linear signal network topology using a series termination is not suitable , the load must be connected to all ends of the transmission line . Otherwise , the load to the intermediate transmission line will be received as a voltage waveform in the waveform diagram of the point C as 3.2.5 . As can be seen , there is a period of time the load is half the signal amplitude of the original signal amplitude. Obviously, this time in a fixed logic state signal , a low tolerance to noise signals .
