Stackup Layer Structure

Hi,

I will design a PCB after that send you to produce.

However, I'm not sure I set the stackup you produced right. 

The core should be the middle part, and the dielectric coefficient is 4.29 for FR4, right? According to the values you showed in the link, prepreg seems to be the core of others in the middle.

Link : https://www.pcbway.com/blog/Engineering_Technical/stackup___pcbway.html

Please confirm the Altium stackup image I added below because I will draw a PCB with ethernet according to your standard stackup. The impedance matching feature is increasing the price so I apply for such a way, do you think I can run the ethernet module with the standard stackup?

Finally, the copper thickness after plating for top and bottop layers is shown as 35um, but core is 18um. What value should I reference?