A heavy trace or conductive metal strip on the printed circuit board used to distribute voltage, grounds, etc., to smaller branch trances.
A method of testing devices via electrical stress vs temperature and/or time so that units prone to failure are eliminated.
A via that does not reach a surface layer on either side of a multi-layer board. The via transcends only inner layers of the board.
A swelling of a printed board that is usually caused by internal de-lamination or separation of fibres.
( prepreg ) Partially cured resin ( mostly reinforced with glass cloth ) which will soften under a special&nbs...
A resin in an intermediate state of cure. The cure is normally completed during the laminating cycle.
A condition where excess solder builds up in the air gap between conductors and causes them to short together....
The voltage at which an insulator or dielectric ruptures or at which ionization and conduction take place in a...
A conductor which connects electrically two or more leads on a printed board assembly. Some branched conductors, no...
The deviation from the flatness of a board characterized by a roughly cylindrical or spherical curvature. If the&nb...
A self-test designed into components at the silicon level, permitting testing via a built-in, four-or-five-pin test bus&...
Patterns that appear in the border area, such as tooling features, test patterns and registration marks.
The duration from hot-bar-heat-up (contact with lead and pad ) until the solder joint is completed.
An adhesive layer used in bonding together other discrete layers of multi-layer printed board during lamination.
Ranking | Name | Answers |
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1 | PCBWay Team | 6 |
2 | Engineer | 1 |
3 | Stephen Newport | 1 |