The circuit layout is as important as design when implementing a DC-DC buck converter. Poor layout can seriously reduce the design effect. Now let PCBWay introduce some of the best layout practices.
Good goals of circuit layout
1.Control radiation and induced noise
2.Reduce interference between different parts of the circuit
3.Reduce circuit area
4.Effective thermal management
5.Improved voltage regulation and circuit efficiency
6.Avoid additional "band-aid" circuits such as buffers
7.Increase stability
Current loop in the power converter circuit
The power converter circuit generates large currents that circulate in the two main loops at different phases: the off state and the on the state, depending on the state of the MOSFET switch (see Figure 1).
(Figure 1)
The 3D geometry of these loops is important. According to Ampere's law, the current running in the physical loop will form a magnetic field proportional to the current and loop area. Then, according to Faraday's law, the field can be coupled to other circuit loops with more coupling at higher frequencies, resulting in unwanted crosstalk.
Therefore, the general way of thinking should be to minimize the closed area of these loops. A straightforward approach to PCBWay is to make the return path as collinear as possible with the outbound path.
Imagine a loop antenna flattened to a vertical line, it will no longer be an antenna. This is why we twist the wires together to eliminate coupling noise.
Return path
Note that if an infinite ground plane is given, the return current naturally tend to concentrate directly below the outbound current (see Figure 2). We should draw this hint from nature and provide a natural return path. Otherwise, we will introduce a cycle and radiate.
(Figure 2)
The expected result of the board will be that the outbound and return currents operate in an orderly known path.
Typically, a circuit has multiple ground planes. For example, analog, digital, and power. Although traditional concepts have changed over the years, if we provide these natural circuits, we do not need to divide the ground plane. In fact, if the unplanned return current has to circumvent a long path, the partition will make things worse.
A natural current path other than a smart partition may be the best solution.
Best Practices
Of course, the key consideration is where the power rail enters or originates from the board. If these considerations are under the designer's control, then those should be chosen to promote a good layout. Note that the same loop principle should also be applied to the MOSFET gate driver because it also has large spike currents.
To further control the radiated emissions, the "20H Rule" specifies that for layers with a spacing of H, we must retain all traces at least 20H from the edge of the board. It is often necessary to use power vias to push the power path to the other layers for a compact layout. You only need to manage the effects of these vias just like any other component in the power path. The inductance, resistance, and the total number of vias all affect path performance.
Sensitive control circuits require a clean ground. If we send a large pulse power return current through the return path shared by the controller, a voltage spike will be generated which will disturb the grounding of the controller and inject noise into the control circuit, which is highly undesirable. We use star grounding to avoid this (see Figure 3) - keep the return path unshared and separated.
(Figure 3)
