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Advances in key technologies and high-speed high-density PCB design

by: Feb 25,2014 1058 Views 0 Comments Posted in Engineering Technical

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High speed and high density has gradually become one of the many significant trends of modern electronic products , high-speed high-density PCB design technology that is becoming an important area of ​​research.

Compared with traditional PCB design , high-speed high-density PCB design has several key technical issues need to develop new design techniques , there are many theoretical and technical issues to be studied. Meanwhile, the high-speed high-density PCB increasingly high demand , high speed and high density PCB design so constantly faced with new problems ; number of related research results emerging, to promote high-speed high-density PCB design technology continues to develop . This article describes the key technical issues Progress ( signal integrity, power integrity , EMC / EM I and thermal analysis ) and related EDA technology high-density , high-speed PCB design , discuss several important trends in high speed and high density PCB design.

The key technical issues

The key technical issues of high speed and high density PCB design main signal integrity (signal integrity, SI), power integrity (power integrity, PI), EMC / EM I and thermal analysis .

Signal Integrity

Mainly refers to the signal integrity of the signal quality of the signal transmission line can be a signal when the circuit timing requirements (timing), the duration and amplitude of the voltage of the pin reaches the receiver chip , the circuit will have a good signal integrity. When the signal or the signal quality not normally respond to long-term stability can not make the system work, it

Signal integrity problems emerged . Signal integrity problems mainly as follows: Delay, reflection , overshoot, ringing , crosstalk , timing, simultaneous switching noise , EM I like.

Signal integrity problems will directly cause signal distortion , timing errors, and error data, address and control signals , thus causing a system error or crash . Typically , digital chips, higher than V IH is a logic 1 level , a level below V IL logic 0 level between VIL ~ VIH is undefined. For digital signal ringing , when the oscillation level of uncertainty into the VIL ~ VIH area , it may cause logic errors. Transmission of digital signals must have the correct timing. General digital chips would require data must be stable before the clock edge trigger tsetup, in order to ensure the correct timing logic . Signal transmission delay time is too long , you may not receive the correct logic in rising or falling edge of the clock , causing timing errors .

Causes signal integrity problems more complicated parameter components , PCB parameters , components on the PCB layout , high speed signal wiring and the like are all important factors that affect signal integrity . Signal integrity is a system problem , study and solve signal integrity problems must use the system point of view.

In contrast, the study of signal integrity problems that people have experienced for decades , made ​​a lot of important theoretical and technological achievements and accumulated rich experience. Many signal integrity technology is relatively mature, has been widely used .

Power Integrity

Power integrity mainly refers to the high-speed system, the power distribution system (powerdistribution system, PDS) at different frequencies, different impedance characteristics , so that the voltage of the power supply layer PCB with ground between the different boards throughout , resulting in power supply is not continuous, generating power supply noise , the chip does not work. Meanwhile, the high-frequency radiation , power integrity issues will bring EMC / EM I question . In the high-speed, low operating voltage of the circuit, power supply noise is particularly serious harm .

Power Integrity presented , without considering the impact from the lower wiring and power based on device model carried a huge error signal integrity analysis brought .

In contrast, the integrity of the power of a late start , theoretical research and technical means are still not mature enough , is the high-speed high-density PCB design one of the biggest challenges. The key is to take some measures to pass , to a certain extent, to minimize the adverse effects caused by the power integrity issues . The main measures taken , first, to optimize the PCB stack layout and wiring design ; second is appropriate to increase the decoupling capacitors. When the system frequency is less than 300 ~ 400 MHz, setting in place a suitable capacitor to help reduce the impact of power integrity problems. However, when higher system frequency decoupling capacitors little effect . In this case, only by optimizing the design to reduce the impact of PCB power integrity problems.

EMC

EMC (electro-magnetic compatibility) is usually defined as: " a device or system to work properly in its electromagnetic environment without anything in that environment can not constitute the ability to withstand the electromagnetic disturbance ." And some is defined as: " a limited study space limited time and limited spectrum resources, a variety of electrical equipment ( subsystems , systems, generalized include organisms ) can not coexist downgrade to cause a science . "

EMC main EM I (electro-magnetic interference) and EMS (electro-magnetic suscep tibility) two aspects . EM I is due to electromagnetic interference generated by the source coupled to the energy transfer path caused by sensitive systems . It includes common ground wires and conduction , radiation or coupling through space in three basic forms through the near field .

EMC electronic products is very important , many countries and regions have strict , complete EMC standards, more and more electronic products have entered the market through the testing and certification related to EMC . Moreover, with the electromagnetic environment deteriorating for EMC requirements for electronic products will be higher .

In contrast , EMC problem is most complex. When the rise ( fall ) time (rise time or fall time) is reduced by a 5 ns to 2.5 ns, EM I will increase about 4 times. EM I spectral width inversely proportional to the rise time 1EM I radiation intensity is proportional to the square of the frequency of such an EM I radiation frequency range of tens MHz to several GHz. These short wavelength corresponding to a high frequency , on the PCB or a short cable interconnect chips are likely to be highly efficient in transmitting or receiving antennas , thereby causing severe EMC problems. Henry W Ott Henry Ott , president of consulting firm in the eastern PCB Design Conference (PCB Design Conference-East) on the keynote speech stressed: " In the era of high-speed design , PCB design staff if you do not know more about EMC problems , will face many unexpected problems . " " Because of the design faster, and wireless design has become increasingly common , EMC will be a far greater challenge . "

Due to the complexity of EMC , together with modern electronic products have become increasingly demanding of EMC , EMC technology will be an important area of ​​long-term research needs. EMC currently preventing and resolving problems, mainly to follow some rules prevailing PCB design constraints , but the specific use of those rules , how effective , it must analyze specific issues , depending on the level of theory and practical experience designers a great extent.

Thermal Analysis

Widely used dynamic power CMOS digital chips work with improved speed and larger, such as dynamic power CMOS inverter P

dyn = CLV2DDf0 → 1. Due to the skin effect , the connecting wire cross-sectional area of the effective conductivity decreases with increasing frequency , resulting in increased resistance of the wire connecting with the frequency becomes larger (Racα f). There connecting wire inductor reactance (2πfL) also increases with the frequency becomes larger . Cable impedance can be considered both in series . See also connected with the power wires to improve the operating speed becomes large . Consumption increases that heat increased. Pin high-density packaging and packaging components miniaturization and increasing component density on the PCB , cooling conditions are so poor . These factors can lead to PCB temperature.

Electronic components have a specified operating temperature range , the temperature rise will cause premature failure of components and performance degradation , high temperature will burn components , PCB circuit (PCB traces), vias (vias) and so on. Therefore , high speed and high density PCB thermal analysis is also very important. By thermal analysis to determine the thermal field distribution of the PCB, components and solder temperature , determine potential PCB thermal design and reliability issues so targeted to take the necessary measures.

Thermal analysis of high speed and high density PCB involving heat transfer theory , the thermal model components , layout, circuit operating mode components ( such as static and dynamic ) , a variety of complex factors , such as natural and artificial cooling measures , so this work is very difficult to complete by hand . Although some thermal analysis EDA tools , but can not meet the needs of high speed and high density PCB design.

Incidentally, high speed and high density PCB signal integrity , power integrity , EMC / EM I and other issues of mutual influence and mutual restriction . In the PCB design process, needs to consider these issues.

Progress related EDA technology

Seen from the key technical issues of high speed and high density PCB , the need for traditional methods can not meet the high-speed PCB design of high-density PCB design , according to experts : " To make the high-speed system design, we must first have a strong design concept and high-speed high-speed design theory , standardized design process , the use of advanced high-speed design tools , adequate pre-analysis , get some constraint rules , strictly in accordance with rules-driven layout , simulation after strict to ensure the accuracy of the design , repeated this design process practice to continually improve speed design design skills . " visible , high-speed high-density PCB designs , in addition to the necessary theoretical knowledge and practical experience, to help advanced EDA tools is essential. EDA tools using simulation function , you can determine the function is correct, how performance ; may determine the direction of improvement is correct, how effective ; different solutions can be compared with the selection.

For high-speed high-density PCB design from schematic design to PCB design EDA tools are generally lower in helping to complete . The prevailing EDA tools Protel, PADS, OrCAD, Cadence, Mentor and so on. The EDA tools have their own characteristics , its functions and usage from a lot of literature and websites can be found . Some EDA tools are varying degrees of support for PCB simulation , including signal integrity simulation , electromagnetic interference simulation , thermal simulation. For PCB signal integrity and EMI simulation of the more successful have Cadence, Mentor , etc. ; PCB thermal simulation for the more successful there FLOTHERM, Auto Therm, BETAsoft, Quick Thermal and so on. Focuses on the progress of these new emulation function below.

Signal integrity simulation , Cadence 's SpectraQuest is a good simulation tool , which allows you to modeling , simulation early in the design to form bound by the rules guiding the late layout , improve design efficiency. Cadence in June 2004 launched a thousand MHz specifically for emulators MGH, the simulation can be completed tens of thousands of B IT one thousand MHz signal within a few seconds , making simulation more powerful.

Since power integrity is a new challenge , there is relatively little simulation tools. According to reports , Cadence has the power integrity tools PI market, and has been successfully applied to the design of some customers .

Present simulation results EMC / EM I is the worst , mainly because EMC / EM I complexity. At present, the use of expert examination of the way, that in accordance with internationally accepted standards will EMC / EM I question becomes the PCB layout rules. Cadence 's EMControl is such a similar rule checker expert system , while also providing customized interfaces , enabling customers to prepare for the company's EMC / EM I check the rules. Mentor Graphics' Quiet Expert EM I can check the problems caused by incorrect wiring structure , identify problems , and gives the cause of the problem and the proposed EM I solutions . In the three-dimensional analysis , Ansoft, Ap sim etc. can provide specialized tools and methods , and these tools can be used with Cadence and Mentor Graphics system tools.

FLOTHERM is an electronics industry standard software thermal analysis is based on computational fluid dynamics (CFD) thermal analysis software. There are thousands of worldwide exchange company with FLOTHERM thermal model . Leading electronic component manufacturers offer their products FLOTHERM model to their customers .

Hot Auto Therm board-level thermal analysis tool to analyze the PCB design process early move to achieve a successful PCB design and improve PCB reliability. Auto Therm thermal model to automatically generate a complete database from LAYOUT or Fablink accelerate hot define circuit boards, components and the environment , reduce the execution time of thermal analysis . The results can be customized to the way graphics , charts, and reports. Using what-

if analysis mode by changing the boundary conditions , placing the device and increase the heat sink or fan , rapid analysis and proposed board-level heat distribution under different conditions . Auto Therm can be steady and transient conduction , convection and radiation analysis , and then study the transient effects of cooling failure and circulatory process.

And by determining the temperature gradient BETAsoft , components, and the temperature of the PCB solder can easily determine the design of the cooling and potential reliability issues . As a result of a local variable step finite element differential method , compared with the conventional finite element method , the calculation speed is greatly improved. For heat conduction, convection and radiation conditions , BETAsoft can create complex three-dimensional flow and thermal field model and consider whether to install a heat sink on the components , chip fan , thermal pads and other cooling devices . Analysis of results and the actual results of measurement error BETAsoft 10% can be achieved .

Quick Thermal PCB design can realize online real-time thermal analysis , fast , flexible, easy to assess PCB 's thermal state . Thermal analysis environment with flexible settings, components property setting function for quick compromise . With an intuitive real-time results of isothermal chart display, alarm display. In addition , Altium 's Protel 2004 in the simulation function also significantly enhanced.

Several trends

Chip design, package design and PCB board design are inseparable

For the design process on the wafer , it is necessary to consider the use of a suitable package and PCB match , the overall chip layout design process is not only restricted , but also take into account the many constraints of the PCB board . Where would appear not to be considered a signal of continuity , where there will be matching. In terms of the chip package , and PCB matching is one aspect , but more importantly it is appropriate packaging options to solve the PCB board -level signal integrity , EMC / EM I and other issues of great help. For example , some timing problems difficult to solve in the PCB , the package is very easy to solve. The new package design is to reduce the chip parasitics , which would weaken parasitics . Chip parasitics include ground bounce and noise propagation delay , edge rate , the frequency response, the output lead lag, antenna effects. The new package design includes multiple ground and power pins , short lead and make the smallest capacitive coupling between the pin layout . The new package design for improved EMC performance results are obvious. For example , DQFN a smaller package leadframe packaging and the use of lead solder terminals instead of the outside , which greatly reduces the length of the cable package and associated parasitics . Compared with the TSSOP package , DQFN package connection length decreases greater than 50 %.

Therefore, the high-speed high-density PCB designs, chip design, package design and PCB board design more closely , taking into account the need for designers to Silicon-Package-Board design and coordinate the relationship between them. It is also a major problem EDA vendors need long face.

Cadence is a leader in system-level design flow , its Allegro platform that covers the board-level design and package -level design , and can be , and several other series of Cadence IC design platform , to form a complete design chain , to achieve effective exchange of data and communication. In addition , Cadence 's VSIC (virtual system interconnect) design approach is a new Silicon-Package-Board co-design approach that allows designers early in the design can consider the timing or signal integrity problems caused the whole system to solve the thousands MHz signal design is a major problem .

The increasingly important role of EDA tools

On the one hand , the high-speed high-density PCB key technical issues, any one of a complete solution to help EDA tools are inseparable . On the other hand , high-speed high-density PCB increasing demands , in turn, prompted EDA vendors continue to develop better EDA tools. Both form a virtuous cycle , relations have become closer. To be sure , the high-speed high-density PCB design, EDA tools, and more important role . For designers, grasp and appropriate application of advanced EDA tools will become one of the must-have qualities .

Currently, the field of EDA involved very extensive , including networking, communications, computer , aerospace and so on. Design products are involved in the system board -level design , system digital / IF analog / digital-analog mixed / RF simulation design, system IC / ASIC / FPGA 's / simulation / verification , hardware and software co-design and so on. There are many manufacturers in the development of EDA tools , the most representative Cadence, Mentor Graphics, Synop sis and so on. Each vendor has its own strengths products. From a market share see , Cadence 's strengths products and services designed IC board diagram , MentorGraphics strengths of products for PCB design and deep submicron IC design verification and test , Synop sis strength products for logic synthesis . Any vendors are difficult to provide a variety of designs to meet the needs of most of the design process. Product manufacturers to use standardized methods to solve this problem , which allows designers to use a number of the company's strengths in its product design process , the composition of the optimal design process.

Parallel design will be widely applied

With increasingly fierce competition in the electronic products , try to shorten product design cycles , bring products to market as quickly as possible is very important. Parallel design methods recently introduced to shorten the design cycle of large electronic systems , is an important way . Parallel design is also known as collaborative design , is to split a large circuit board into several parts , with several people at the same design. Currently , some parallel design tool has been able to achieve docking and integration between the various parts of the design , can " see" the design of other designers , even to achieve full real-time parallel design . Mentor

Graphics EDA tools in parallel with the design advantages , launched in late 2004 , full-motion parallel ExtremePCB powerful design tool , to achieve full real-time parallel design . Parallel Cadence design tools will also be introduced in the next version .

Conclusion

High speed, high density is one of the significant trends in many electronic products , high-speed high-density PCB design research technique has important practical significance. High-speed high-density PCB design technology is very complex, by components , PCB plate , EMC, EDA technology level constraints, associated research are vigorously promoting , new materials , new processes , new products, new technologies continue to emerge to make high-speed high-density PCB design constantly faced with new problems , but also to promote high-speed high-density PCB design technology forward. This discussion of the research and application of high speed and high density PCB design technology with guidance.

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