Bzaah V0IDZP
UNITED KINGDOM • + Follow
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Apr 28,2024
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PCIE-DMA Direct Memory Access
PCIEDMA Direct Memory Access Board
1318
10
18
Published: Apr 28,2024
BOM(Bill of materials)
Centroid file
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File Last Updated: 2024/06/26 (GMT+8)
File update record
2024-06-2609:20:50
Gerber file is updated.
2024-06-0509:25:36
Parts List (BOM) is updated.
2024-06-0401:05:08
Parts List (BOM) is updated.
2024-05-1801:54:17
Parts List (BOM) is updated.
2024-04-2821:30:28
Gerber file is updated.
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- Comments(18)
- Likes(10)
- Engineer Dec 31,2024
- Engineer Nov 11,2024
- Radion Mynayev Oct 29,2024
- Engineer Oct 06,2024
- Skyler Yarger Sep 28,2024
- Gojo Satoru May 10,2024
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this is correct... no that is all the traces that need impedance thank you
Thanks for your quickly reply. We get it.
Answers: 1. Yes this board has been produced before, Any Issues No 2.Impedance control PCIe® Gen 1 and 2:100 Ω ±5% differential; 50 Ω ±5% single ended PCIe® Gen 3 and 4: 85 Ω ±5% differential; 42.5 Ω ±5% single ended 4.. 1.44 to 1.70 mm (0.057 to 0.069 inches), which would be a tolerance of about ±8%. 5. Bevelling of the gold fingers must be avoided
Thank you for your quickly response. To help the factory better identify the traces requiring impedance control, could you specify which trace in the Gerber files require impedance control based on their trace width and spacing? Alternatively, could you mark them on a picture? Additionally, could you provide the stack-up information you have previously used? If it's inconvenient to attach pictures here, feel free to send them to mia@pcbway.com. Much appreciated.
PCIe connector and USB3 traces would be impedance matched on top and bottom layers
R49 = 50K Part NO C137969 = 49.9K
OK, thanks for your reply. We get it.
R19 = 900K R49, R53 R55 = 50K